Syllabus Sections:-
Frequency synthesis
3C3
21 Recall the block diagram of
a Phase Locked Loop (PPL) frequency synthesiser and the
functions of the stages (i.e. oscillator, fixed divider,
phase detector, LPF, voltage controlled oscillator and
programmable divider).
Maths formula also most certain to
be used in this question !!!
Please
note that the Phase Detector can also be know as a Phase Comparator.
Where Fout
= the final output frequency
fcrystal
= the frequency of the crystal
N = the
programmable divide by number
A = the
fixed divide by number
The
frequency out is given by the frequency of the crystal times
the divide by N divided by the fixed divider A.
The
equation above is a useful one to fully understand as it is
difficult to work out from the diagram above or the text below
!!!
Another
equation associated with the above is
fstep
= the size of the frequency step from one frequency to
the next
fcrystal
= the frequency of the crystal
A = the
fixed divide by number
Explanation
The
diagram above show a modern Frequency Synthesiser. This is a
PLL or Phase locked Loop.
The
crystal reference oscillator
The
crystal reference oscillator is made to a high standard so
that it can provide a good stable output frequency that acts
as the heart of the synthesiser.
the
fixed divider
The
"reference frequency" is then divided down by the fixed
divider. This is a solid state digital chip which divides down
the original 6MHz to 1kHz and this has the same accuracy as
the crystal oscillator because it is derived directly from the
crystal oscillator.
Note: The
frequencies given, in the diagram above, are examples and many
other designs exist.
Voltage
controlled oscillator
The VCO
is a voltage controlled oscillator whose frequency is
controlled by changes in applied voltage. When it starts
running it is not stable and said to be "Out of lock" and the
output would need to be inhibited so that transmission did not
occur. Even when out of lock the pulses are sent to the
Programmable divider for processing.
The
programmable divider
The
programmable divider is set to divide the VCO frequency down
so that the output of the programmable divider is also 1kHz.
Phase
detector
A
comparison can then be made between the two 1kHz pulses. If
the pulse from the programmable divider is slightly low then
the pulses will be out of phase with each other and this is
detected in the Phase comparator.
Low
pass filter
This
error is then passed as a voltage change to the low pass
filter to clean it up and then to the VCO. The VCO frequency
then changes as a result of the voltage change, and becomes
very close to the desired frequency (in effect it is now
"LOCKED").
This
process continues to make small adjustment to the VCO as
required, hence keeping the transceiver on frequency.
When it
is desired that a large change of frequency is made, this is
achieved by setting the programmable divider by the control
lines. Immediately, the synthesiser is "unlocked" or "out of
lock" and a large error voltage results. This causes the VCO
to change frequency rapidly and "lock" to the new setting. It
is very desirable that there is no output from the transmitter
whilst the synthesiser is "unlocked" or "out of lock", and it
is usual to take a signal from the synthesiser which inhibits
the transmitter until "lock" has occurred.
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